Accel 23 Registers Settings

Settings for registers of Accel 23 Click driver. More...

Macros
#define	ACCEL23_WHO_AM_I   0x47
	Accel 23 WHO_AM_I register setting.
#define	ACCEL23_CTRL1_SMART_POWER_EN   0x80
	Accel 23 CTRL1 register setting.
#define	ACCEL23_CTRL1_INT1_ON_RES   0x40
#define	ACCEL23_CTRL1_SW_RESET   0x20
#define	ACCEL23_CTRL1_IF_ADD_INC   0x10
#define	ACCEL23_CTRL1_DRDY_PULSED   0x08
#define	ACCEL23_CTRL1_WU_X_EN   0x04
#define	ACCEL23_CTRL1_WU_Y_EN   0x02
#define	ACCEL23_CTRL1_WU_Z_EN   0x01
#define	ACCEL23_CTRL5_ODR_PWR_DOWN   0x00
	Accel 23 CTRL5 register setting.
#define	ACCEL23_CTRL5_ODR_ULP_1_6_HZ   0x10
#define	ACCEL23_CTRL5_ODR_ULP_3_HZ   0x20
#define	ACCEL23_CTRL5_ODR_ULP_25_HZ   0x30
#define	ACCEL23_CTRL5_ODR_6_HZ   0x40
#define	ACCEL23_CTRL5_ODR_12_5_HZ   0x50
#define	ACCEL23_CTRL5_ODR_25_HZ   0x60
#define	ACCEL23_CTRL5_ODR_50_HZ   0x70
#define	ACCEL23_CTRL5_ODR_100_HZ   0x80
#define	ACCEL23_CTRL5_ODR_200_HZ   0x90
#define	ACCEL23_CTRL5_ODR_400_HZ   0xA0
#define	ACCEL23_CTRL5_ODR_800_HZ   0xB0
#define	ACCEL23_CTRL5_ODR_ONE_SHOT_INT2   0xE0
#define	ACCEL23_CTRL5_ODR_ONE_SHOT_IFACE   0xF0
#define	ACCEL23_CTRL5_ODR_MASK   0xF0
#define	ACCEL23_CTRL5_BW_ODR_2   0x00
#define	ACCEL23_CTRL5_BW_ODR_4   0x04
#define	ACCEL23_CTRL5_BW_ODR_8   0x08
#define	ACCEL23_CTRL5_BW_ODR_16   0x0C
#define	ACCEL23_CTRL5_BW_MASK   0x0C
#define	ACCEL23_CTRL5_FS_2_G   0x00
#define	ACCEL23_CTRL5_FS_4_G   0x01
#define	ACCEL23_CTRL5_FS_8_G   0x02
#define	ACCEL23_CTRL5_FS_16_G   0x03
#define	ACCEL23_CTRL5_FS_MASK   0x03
#define	ACCEL23_STATUS_INT_GLOBAL   0x20
	Accel 23 STATUS register setting.
#define	ACCEL23_STATUS_DRDY   0x01
#define	ACCEL23_EN_DEVICE_CONFIG_SOFT_PD   0x01
	Accel 23 EN_DEVICE_CONFIG register setting.
#define	ACCEL23_ODR_PWR_DOWN   0
	Accel 23 output data rate setting.
#define	ACCEL23_ODR_ULP_1_6_HZ   1
#define	ACCEL23_ODR_ULP_3_HZ   2
#define	ACCEL23_ODR_ULP_25_HZ   3
#define	ACCEL23_ODR_6_HZ   4
#define	ACCEL23_ODR_12_5_HZ   5
#define	ACCEL23_ODR_25_HZ   6
#define	ACCEL23_ODR_50_HZ   7
#define	ACCEL23_ODR_100_HZ   8
#define	ACCEL23_ODR_200_HZ   9
#define	ACCEL23_ODR_400_HZ   10
#define	ACCEL23_ODR_800_HZ   11
#define	ACCEL23_ODR_ONE_SHOT_INT2   14
#define	ACCEL23_ODR_ONE_SHOT_IFACE   15
#define	ACCEL23_FS_2G   0
	Accel 23 full scale setting.
#define	ACCEL23_FS_4G   1
#define	ACCEL23_FS_8G   2
#define	ACCEL23_FS_16G   3
#define	ACCEL23_ACCEL_SENS_G_PER_LSB   0.000061
	Accel 23 sensitivity setting.
#define	ACCEL23_TEMP_SENS_C_PER_LSB   0.045
#define	ACCEL23_TEMP_OFFSET   25.0
#define	ACCEL23_DEVICE_ADDRESS_0   0x18
	Accel 23 device address setting.
#define	ACCEL23_DEVICE_ADDRESS_1   0x19
#define	ACCEL23_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
	Data sample selection.
#define	ACCEL23_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE

Detailed Description

Settings for registers of Accel 23 Click driver.

Macro Definition Documentation

ACCEL23_ACCEL_SENS_G_PER_LSB

#define ACCEL23_ACCEL_SENS_G_PER_LSB   0.000061

Accel 23 sensitivity setting.

Specified setting for sensitivity of Accel 23 Click driver.

ACCEL23_CTRL1_DRDY_PULSED

#define ACCEL23_CTRL1_DRDY_PULSED   0x08

ACCEL23_CTRL1_IF_ADD_INC

#define ACCEL23_CTRL1_IF_ADD_INC   0x10

ACCEL23_CTRL1_INT1_ON_RES

#define ACCEL23_CTRL1_INT1_ON_RES   0x40

ACCEL23_CTRL1_SMART_POWER_EN

#define ACCEL23_CTRL1_SMART_POWER_EN   0x80

Accel 23 CTRL1 register setting.

Specified setting for CTRL1 register of Accel 23 Click driver.

ACCEL23_CTRL1_SW_RESET

#define ACCEL23_CTRL1_SW_RESET   0x20

ACCEL23_CTRL1_WU_X_EN

#define ACCEL23_CTRL1_WU_X_EN   0x04

ACCEL23_CTRL1_WU_Y_EN

#define ACCEL23_CTRL1_WU_Y_EN   0x02

ACCEL23_CTRL1_WU_Z_EN

#define ACCEL23_CTRL1_WU_Z_EN   0x01

ACCEL23_CTRL5_BW_MASK

#define ACCEL23_CTRL5_BW_MASK   0x0C

ACCEL23_CTRL5_BW_ODR_16

#define ACCEL23_CTRL5_BW_ODR_16   0x0C

ACCEL23_CTRL5_BW_ODR_2

#define ACCEL23_CTRL5_BW_ODR_2   0x00

ACCEL23_CTRL5_BW_ODR_4

#define ACCEL23_CTRL5_BW_ODR_4   0x04

ACCEL23_CTRL5_BW_ODR_8

#define ACCEL23_CTRL5_BW_ODR_8   0x08

ACCEL23_CTRL5_FS_16_G

#define ACCEL23_CTRL5_FS_16_G   0x03

ACCEL23_CTRL5_FS_2_G

#define ACCEL23_CTRL5_FS_2_G   0x00

ACCEL23_CTRL5_FS_4_G

#define ACCEL23_CTRL5_FS_4_G   0x01

ACCEL23_CTRL5_FS_8_G

#define ACCEL23_CTRL5_FS_8_G   0x02

ACCEL23_CTRL5_FS_MASK

#define ACCEL23_CTRL5_FS_MASK   0x03

ACCEL23_CTRL5_ODR_100_HZ

#define ACCEL23_CTRL5_ODR_100_HZ   0x80

ACCEL23_CTRL5_ODR_12_5_HZ

#define ACCEL23_CTRL5_ODR_12_5_HZ   0x50

ACCEL23_CTRL5_ODR_200_HZ

#define ACCEL23_CTRL5_ODR_200_HZ   0x90

ACCEL23_CTRL5_ODR_25_HZ

#define ACCEL23_CTRL5_ODR_25_HZ   0x60

ACCEL23_CTRL5_ODR_400_HZ

#define ACCEL23_CTRL5_ODR_400_HZ   0xA0

ACCEL23_CTRL5_ODR_50_HZ

#define ACCEL23_CTRL5_ODR_50_HZ   0x70

ACCEL23_CTRL5_ODR_6_HZ

#define ACCEL23_CTRL5_ODR_6_HZ   0x40

ACCEL23_CTRL5_ODR_800_HZ

#define ACCEL23_CTRL5_ODR_800_HZ   0xB0

ACCEL23_CTRL5_ODR_MASK

#define ACCEL23_CTRL5_ODR_MASK   0xF0

ACCEL23_CTRL5_ODR_ONE_SHOT_IFACE

#define ACCEL23_CTRL5_ODR_ONE_SHOT_IFACE   0xF0

ACCEL23_CTRL5_ODR_ONE_SHOT_INT2

#define ACCEL23_CTRL5_ODR_ONE_SHOT_INT2   0xE0

ACCEL23_CTRL5_ODR_PWR_DOWN

#define ACCEL23_CTRL5_ODR_PWR_DOWN   0x00

Accel 23 CTRL5 register setting.

Specified setting for CTRL5 register of Accel 23 Click driver.

ACCEL23_CTRL5_ODR_ULP_1_6_HZ

#define ACCEL23_CTRL5_ODR_ULP_1_6_HZ   0x10

ACCEL23_CTRL5_ODR_ULP_25_HZ

#define ACCEL23_CTRL5_ODR_ULP_25_HZ   0x30

ACCEL23_CTRL5_ODR_ULP_3_HZ

#define ACCEL23_CTRL5_ODR_ULP_3_HZ   0x20

ACCEL23_DEVICE_ADDRESS_0

#define ACCEL23_DEVICE_ADDRESS_0   0x18

Accel 23 device address setting.

Specified setting for device slave address selection of Accel 23 Click driver.

ACCEL23_DEVICE_ADDRESS_1

#define ACCEL23_DEVICE_ADDRESS_1   0x19

ACCEL23_EN_DEVICE_CONFIG_SOFT_PD

#define ACCEL23_EN_DEVICE_CONFIG_SOFT_PD   0x01

Accel 23 EN_DEVICE_CONFIG register setting.

Specified setting for EN_DEVICE_CONFIG register of Accel 23 Click driver.

ACCEL23_FS_16G

#define ACCEL23_FS_16G   3

ACCEL23_FS_2G

#define ACCEL23_FS_2G   0

Accel 23 full scale setting.

Specified setting for full scale of Accel 23 Click driver.

ACCEL23_FS_4G

#define ACCEL23_FS_4G   1

ACCEL23_FS_8G

#define ACCEL23_FS_8G   2

ACCEL23_ODR_100_HZ

#define ACCEL23_ODR_100_HZ   8

ACCEL23_ODR_12_5_HZ

#define ACCEL23_ODR_12_5_HZ   5

ACCEL23_ODR_200_HZ

#define ACCEL23_ODR_200_HZ   9

ACCEL23_ODR_25_HZ

#define ACCEL23_ODR_25_HZ   6

ACCEL23_ODR_400_HZ

#define ACCEL23_ODR_400_HZ   10

ACCEL23_ODR_50_HZ

#define ACCEL23_ODR_50_HZ   7

ACCEL23_ODR_6_HZ

#define ACCEL23_ODR_6_HZ   4

ACCEL23_ODR_800_HZ

#define ACCEL23_ODR_800_HZ   11

ACCEL23_ODR_ONE_SHOT_IFACE

#define ACCEL23_ODR_ONE_SHOT_IFACE   15

ACCEL23_ODR_ONE_SHOT_INT2

#define ACCEL23_ODR_ONE_SHOT_INT2   14

ACCEL23_ODR_PWR_DOWN

#define ACCEL23_ODR_PWR_DOWN   0

Accel 23 output data rate setting.

Specified setting for output data rate of Accel 23 Click driver.

ACCEL23_ODR_ULP_1_6_HZ

#define ACCEL23_ODR_ULP_1_6_HZ   1

ACCEL23_ODR_ULP_25_HZ

#define ACCEL23_ODR_ULP_25_HZ   3

ACCEL23_ODR_ULP_3_HZ

#define ACCEL23_ODR_ULP_3_HZ   2

ACCEL23_SET_DATA_SAMPLE_EDGE

#define ACCEL23_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note

Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with accel23_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

ACCEL23_SET_DATA_SAMPLE_MIDDLE

#define ACCEL23_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE

ACCEL23_STATUS_DRDY

#define ACCEL23_STATUS_DRDY   0x01

ACCEL23_STATUS_INT_GLOBAL

#define ACCEL23_STATUS_INT_GLOBAL   0x20

Accel 23 STATUS register setting.

Specified setting for STATUS register of Accel 23 Click driver.

ACCEL23_TEMP_OFFSET

#define ACCEL23_TEMP_OFFSET   25.0

ACCEL23_TEMP_SENS_C_PER_LSB

#define ACCEL23_TEMP_SENS_C_PER_LSB   0.045

ACCEL23_WHO_AM_I

#define ACCEL23_WHO_AM_I   0x47

Accel 23 WHO_AM_I register setting.

Specified setting for WHO_AM_I register of Accel 23 Click driver.